Session 1: Multicore/Manycore SoCs Architectures and Programming

Code Generation of Graph-Based Vision Processing for Multiple CUDA Cores SoC Jetson TX

Elishai Ezra Tsur (Neuro-Biomorphic Engineering Lab, Faculty of Engineering, Jerusalem College of Technology), Elyassaf Madar (Neuro-Biomorphic Engineering Lab, Faculty of Engineering ,Jerusalem College of Technology), Natan Danan (Neuro-Biomorphic Engineering Lab, Faculty of Engineering ,Jerusalem College of Technology)

An FPGA Scalable Parallel Viterbi Decoder [slides.pdf]

Yosi Ben Asher (CS, University of Haifa), Vladislav Tartakovsky (CS. University of Haifa), Katrina Portman (CS. University of Haifa), Orr Zilberman (CS. University of Haifa), Avishi Hadar (CS. University of Haifa)

An Efficient Parallel Hardware Scheme for Solving the N-Queens Problem  [slides.pdf]

Yuuma Azuma (Department of Computer Science, Tokyo Institute of Technology, Tokyo, Japan), Hayato Sakagami (Department of Computer Science, Tokyo Institute of Technology, Tokyo, Japan), Kenji Kise (Department of Computer Science, Tokyo Institute of Technology, Tokyo, Japan)

Simplified Quadcopter Simulation Model for Spike-Based Hardware PID Controller using SystemC-AMS  [slides.pdf]

Shunsuke Mie (The University of Aizu), Yuichi Okuyama (The University of Aizu), Hiroaki Saito (The University of Aizu)


Session 2: Multicore/Manycore SoCs Design

Unifying Wire and Time Scheduling for Highlevel Synthesis [slides.pdf]

Yosi Ben Asher (CS. University of Haifa), Irina Lipov (IBM HRL. Haifa)

IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs [slides.pdf]

Khoa Pham (The University Of Manchester), Edson Horta (University of Manchester), Dirk Koch (University of Manchester), Anuj Vaishnav (University of Manchester), Thomas Kuhn (Halbleiter Test- & Vertriebs GmbH)

On-Chip Lifetime Prediction for Dependable Many-Processor SoCs Based on Data Fusion [slides.pdf]

Ghazanfar Ali (University of Twente), Jerrin Pathrose (University of Twente), Hans Kerkhoff (University of Twente)

Design Features of Analog-to-Digital Solutions for the Tracking Detector Readout Electronics

Aleksandr Kostrov (Belarusian State University of Informatics and Radioelectronics7746.1511224294), Viktor Stempitsky (Belarusian State University of Informatics and Radioelectronics7746.1511224294), Artur Borovik (Belarusian State University of Informatics and Radioelectronics7746.1511224294), Vladimir Tchekhovsky (Research Institute for Nuclear Problems of Belarusian State University11224294)


Session 3: Special Session on Artificial Intelligence for Multimedia Communications

Bluetooth Low Energy Based Indoor Positioning on iOS Platform [slides.pdf]

Son Ngoc Duong (University of Engineering and Technology, Vietnam National University), Anh Vu-Tuan Trinh (University of Engineering and Technology, Vietnam National University), Thai-Mai Dinh (University of Engineering and Technology, Vietnam National University)

A Practical High Efficiency Video Coding Solution for Visual Sensor Network using Raspberry Pi Platform [slides.pdf]

Thao Nguyen Thi Huong (Posts and Telecommunications Institute of Technology), Huy Phi Cong (Posts and Telecommunications Institute of Technology), Xiem HoangVan (University of Engineering and Technology), Tien Vu Huu (Posts and Telecommunications Institute of Technology)

Adaptive Long-Term Reference Selection for Efficient Scalable Surveillance Video Coding [slides.pdf]

Xiem HoangVan (VNU University of Engineering and Technology), Le Dao Thi Hue (VNU University of Engineering and Technology), Giap PhamVan (VNU University of Engineering and Technology)

Light Field Image Coding for Efficient Refocusing [slides.pdf]

Vinh Van Duong (Department of Electrical and Computer Engineering, Sungkyunkwan University, Korea), Thuong Nguyen Canh (Department of Electrical and Computer Engineering, Sungkyunkwan University, Korea), Byeungwoo Jeon (Department of Electrical and Computer Engineering, Sungkyunkwan University, Korea)


Session 4: Special Session on Intelligent Systems and Learning Technologies: Models, Methods, and Applications

Adaptive Genetic Algorithm for Improving Prediction Accuracy of a Multi-Criteria Recommender System [slides.pdf]

Hamada Mohamed (Software Engineering Lab University of Aizu), Latifat Abdulsalam (Department of Computer Science and Engineering African University of Science and Technology), Hassan Mohammed (Department of Software Engineering Bayero University Kano)

A Fuzzy-Based Approach for Modelling Preferences of Users in Multi-Criteria Recommender Systems [slides.pdf]

Mohamed Hamada (Software Engineering Lab, University of Aizu, Aizuwakamatsu-city, Fukushima, Japan.), Nkiruka Bridget Odu (African University of Science and Technology, Abuja, Nigeria), Mohammed Hassan (Department of Software Engineering, Bayero University, Kano, Nigeria.)


Session 5: Embedded and Real-Time Multicore/Manycore SoC Systems

A Low-Power ASIC Implementation of Multi-Core OpenSPARC T1 Processor on 90nm CMOS Process

Phuc-Vinh Nguyen (Applied Micro Circuits Corporation, Ho Chi Minh City, Vietnam), Thi-Thu-Trang Tran (The University of Science, Vietnam National University Ho Chi Minh City), Phuoc-Loc Diep (The University of Science, Vietnam National University Ho Chi Minh City), Duc-Hung Le (The University of Science, Vietnam National University Ho Chi Minh City)

A Novel Task-to-Processor Assignment Approach for Optimal Multiprocessor Real-Time Scheduling

Duy Doan (JAIST), Kiyofumi Tanaka (Japan Advanced Institute of Science and Technology)

Multikernel Design and Implementation for Improving Responsiveness of Aperiodic Tasks

Hidehito Yabuuchi (The University of Tokyo), Shinichi Awamoto (The University of Tokyo), Hiroyuki Chishiro (The University of Tokyo), Shinpei Kato (The University of Tokyo)


Session 6: Special Session on Auto-Tuning for Multicore and GPU (ATMG2018)

Search Space Reduction for Parameter Tuning of a Tsunami Simulation on the Intel Knights Landing Processor [slides.pdf]

Kazuhiko Komatsu (Cyberscience Center, Tohoku University), Takumi Kishitani (Graduate School of Information Sciences, Tohoku University), Masayuki Sato (Graduate School of Information Sciences, Tohoku University), Akihiro Musa (Cyberscience Center, Tohoku University/NEC Corporation), Hiroaki Kobayashi (Graduate School of Information Sciences, Tohoku University)

Communication-Avoiding Tile QR Decomposition on CPU/GPU Heterogeneous Cluster System

Masatoshi Takayanagi (University of Yamanashi), Tomohiro Suzuki (University of Yamanashi)

Freeze-Safe IoT Hibernation using Power Profile Monitor Based on Communication-Centric Auto-Tuning [slides.pdf]

Hyeon-gyun Moon (Kyungpook National University), Jeonghun Cho (Kyungpook National University), Daejin Park (Kyungpook National University)


Session 7: Multicore/Manycore Interconnection Networks

In-NoC Circuits for Low-Latency Cache Coherence in Distributed Shared-Memory Architectures

Leonard Masing (Karlsruhe Institute of Technology (KIT)), Akshay Srivatsa (Technical University of Munich (TUM)), Fabian Kreß (Karlsruhe Institute of Technology (KIT)), Nidhi Anantharajaiah (Karlsruhe Institute of Technology (KIT)), Andreas Herkersdorf (Technical University of Munich (TUM)), Jürgen Becker (Karlsruhe Institute of Technology (KIT))

Adaptive Body Bias Control Scheme for Ultra Low-Power Network-on-Chip Systems

Akram Ben Ahmed (Keio University), Hayate Okuhara (Keio University), Hiroki Matsutani (Keio University), Michihiro Koibuchi (National Institute of Informatics), Hideharu Amano (Keio University)

Parity-Based ECC and Mechanism for Detecting and Correcting Soft Errors in On-Chip Communication  [slides.pdf]

Khanh Dang (SISLAB, University of Engineering and Technology, Vietnam National University Hanoi (VNU), Hanoi), Xuan-Tu Tran (Vietnam National University Hanoi)

MARTE and IP-XACT Based Approach for Run-Time Scalable NoC [slides.pdf]

Hiliwi Leake Kidane (Université Bourgogne Franche-Comté), El-Bay Bourennane (Université Bourgogne Franche-Comté)


Session 8: Special Session on Scalable and Flexible Many-Core Mapping Techniques

Scalable Dynamic Task Scheduling on Adaptive Many-Core [slides.pdf]

Vanchinathan Venkataramani (National University of Singapore, Singapore), Anuj Pathania (National University of Singapore, Singapore), Muhammad Shafique (Vienna University of Technology, Austria), Tulika Mitra (National University of Singapore, Singapore), Jörg Henkel (Karlsruhe Institute of Technology, Germany)

On the Complexity of Mapping Feasibility in Many-Core Architectures [slides.pdf]

Tobias Schwarzer (Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)), Sascha Roloff (Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)), Valentina Richthammer (Ulm University), Rami Khaldi (Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)), Stefan Wildermann (Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)), Michael Glaß (Ulm University), Jürgen Teich (Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU))

On the Representation of Mappings to Multicores

Andres Goens (TU Dresden), Christian Menard (TU Dresden), Jeronimo Castrillon (TU Dresden)


Session 9: Multicore/Manycore SoCs Applications

Evaluation of Performance and Fault Containment in AUTOSAR Micro-ECUs on a Multi-Core Processor

Moisés Urbina (University of Siegen), Roman Obermaisser (University of Siegen)

Design and Evaluation of a Configurable Hardware Merge Sorter for Various Output Records  [slides.pdf]

Elsayed A. Elsayed (Tokyo Institute of Technology, Japan & Aswan University, Egypt), Kenji Kise (Tokyo Institute of Technology, Japan)

On-Line Cost-Aware Workflow Allocation in Heterogeneous Computing Environments [slides.pdf]

Incheon Paik (University of Aizu), Yuji Ishizuka (University of Aizu), Quang-Minh Do (University of Aizu), Wuhui Chen (Sun Yat-sen University)

FPGA Acceleration to Solve Maximum Clique Problems Encoded into Partial MaxSAT

Kenji Kanazawa (University of Tsukuba), Shaowei Cai (Chinese Academy of Sciences)


Session 10: Algorithms and Hardware for Learning On-Chip and Embedded Neuromorphic Computing Systems

VLSI Design of Floating-Point Twiddle Factor Using Adaptive CORDIC on Various Iteration Limitations

Trong-Thuc Hoang (University of Electro-Communications (UEC)), Duc-Hung Le (The University of Science, Ho Chi Minh City), Cong-Kha Pham (University of Electro-Communications (UEC))

An Efficient Hardware Implementation of Activation Functions Using Stochastic Computing for Deep Neural Networks

Van-Tinh Nguyen (Le Quy Don Technical University), Tieu-Khanh Luong (Le Quy Don Technical University), Han Le Duc (Le Quy Don Technical University), Van-Phuc Hoang (Le Quy Don Technical University)

Area and Energy Optimization for Bit-Serial Log-Quantized DNN Accelerator with Shared Accumulators

Takumi Kudo (Hokkaido University), Kodai Ueyoshi (Hokkaido University), Kota Ando (Hokkaido University), Kazutoshi Hirose (Hokkaido University), Ryota Uematsu (Hokkaido University), Yuka Oba (Hokkaido University), Masayuki Ikebe (Hokkaido University), Tetsuya Asai (Hokkaido University), Masato Motomura (Hokkaido University), Shinya Takamaeda-Yamazaki (Hokkaido University)

Designing Compact Convolutional Neural Network for Embedded Stereo Vision Systems  [slides.pdf]

Mohammad Loni (Mälardalen University), Amin Majd (Åbo Akademi University), Abdolah Loni (Allameh Tabataba’i University), Masoud Daneshtalab (Mälardalen University), Mikael Sjödin (Mälardalen University), Elena Troubitsyna (Åbo Akademi University)