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IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16)
Lyon Congress Center, Lyon, France, September 21-23, 2016
URL: http://www.mcsoc-forum.org/
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The IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip aims at providing the  world’s premier forum of leading  researchers in the embedded Multicore/Many-core SoCs software, tools and  applications design areas for Academia and industries. Prospective authors are invited to submit paper of their works.Submission of a paper implies that at least one of the authors will have a full registration to the symposium upon  acceptance of the paper.

***Program Tracks

Programming: Compilers, automatic code generation methods, cross assemblers, programming models, memory management, runtime management, object-oriented aspects, concurrent software.
Architectures: Multicore, Many-core, re-configurable platforms, memory management support, communication, protocols, real-time systems, SoCs and DSPs, heterogeneous architectures with HW accelerators and GPUs.
Design: Hardware specification, modeling, synthesis, low power simulation and analysis, reliability, variability compensation, thermal aware design, performance modeling, security issues.
Interconnection Networks: Electronic/Photonic/RF NoC architectures, Power and energy issues in NoCs, Application specific NoC design, Timing, Synchronous /asynchronous communication, RTOS support for NoCs, Modeling, simulation, NoC support for MCSoC, NoC for FPGAs and structured ASICs, NoC design tools, Photonic components, Virtual fabrications, Photonic circuits, Routing, Filter design.
Testing: Design-for-test, Test synthesis, Built-in-self-test, Embedded test for MCSoC.
Packaging Technologies: 3D VLSI packaging Technology, Vertical Interconnections in 3D Electronics, Periphery Interconnection between Stacked ICs, Area Interconnection between Stacked ICs, Thermal management schemes.
Real-Time Systems: real-time system design, RTOS, Compilation techniques, Memory/cache optimization, Interfacing and software issues, Distributed real-time systems, real-time kernels, Task scheduling, Multitasking design.
Benchmarks: Parallel Benchmarks, Workload characterization and evaluation
Applications: Bio-medical, Health-care, Computational biology, Internet of Things, Smart Mobility, Electric Vehicles, Aviation, Automobile, Military, and Consumer electronics.

***Special Sessions

    Special Session on Auto-Tuning for Multicore and GPU
    Special Session on Multicore Computing and its Application in Nuclear Engineering
    Special Session on Multicore Cyber-Physical System and Applications
    Special session on Mobile Systems with Multicore Architectures
    Special Session on Dark Silicon Aware Multicore and Many-core Systems

***Important Dates

    Paper Submission: March 31 April 30, 2016 (Extended, HARD deadline!)
    Acceptance notification: June 24, 2016
    Camera ready paper: July 15, 2016
    Symposium: September 21-23, 2016

***Proceedings Publication and Indexing

MCSoC-16 proceedings will be published by IEEE CS Press, which will be included in the Computer Society Digital Library CSDL and IEEE Xplore. All CPS conference publications are also submitted for indexing to EI’s Engineering Information Index, Compendex, and ISI Thomson’s Scientific and Technical Proceedings, ISTP/ISI Proceedings, and ISI Thomson.

***Best Paper Award
IEEE MCSoC-16 features Best Paper Award to award authors with superior quality paper submission to this Symposium. The award includes a certificate. The authors of Best Paper Award will be recognized in the conference.

***Special Issue
Authors of selected papers from IEEE MCSoC-16 Symposium will be invited to submit extended versions of their papers to  journal/transaction for inclusion in special issues (TBD).

*Organization Committee

General Chairs
-Sébastien Le Beux, ECL, France
-Toshiyaki Miyazaki, UoA, Japan

Program Chairs
-Ian O’Connor, ECL, France
-Kenji Kise, TOKYO TEC, Japan

Workshops/Special Sessions Co-Chairs
-Davide Bertozzi, University of Ferrara, Italy

Local Arrangement Chair
-Martha Sepulveda, TUM, Germany

Finance Chair
-David Navarro, ECL, France

Registration Chair
-Jacqueline Million, Centrale Innovation, France

Publicity Chairs
-Gilles Sassatelli, LIRMM, France
-Hiroshi Saito, UoA, Japan

Publication Chair
-Carlo Galuzzi, TU Delft, Netherlands

International Liaisons
-Kuan-Ching Li, Providence Univ., Taiwan
-Gabriela Nicolescu, Ecole Polytechnique de Montréal, Canada
-Stephane Louise, CEA, Univ. Paris-Saclay, France

Advisory Board

-Hideharu Amano, Keio University, Japan
-Stanislav G. Sedukhin, Univ. of Aizu, Japan
-Andrea Acquaviva, Polytechnic of Turin, Italy
-Tsuneo Tsukahara, Univ. of Aizu, Japan
-Tohru Ishihara, Kyoto University, Japan

Steering Committee
-Tomohiro Yoneda, National Institute of Informatics, Japan
-Ahmed Louri, George Washington University, USA
-Jiang Xu, Hong Kong Univ. of Sciences and Technology, Hong Kong, SAR
-Toshiaki Miyazaki, Univ. of Aizu, Japan
-Luca Benini, ETH Zurich, Switzerland
-Sébastien Le Beux, ECL, France
-Abderazek Ben Abdallah, Univ. of Aizu, Japan (chair)