Organizer/Chair
Daisuke Suzuki, The University of Aizu, Japan
Call for Papers: pdf
A field-programmable gate arrays (FPGA) whose function can be reconfigured by users is one viable candidate for the edge AI hardware platform. On the other hand, a conventional SRAM-based FPGA suffers serious standby issues since the power supply must be continuously applied to keep internal data. This standby power issue is more serious in state-of-the-art nanometer CMOS technologies. From this point of view, this special session focuses on the novel device, circuit, architecture, and CAD technologies for near future advanced FPGAs and their edge-AI computing. Papers are solicited in the following areas, but are not limited to:
Topics of Interest:
- Nonvolatile FPGA and its related technologies
- Device technologies for energy-efficient FPGA
- Circuit technologies for energy-efficient FPGA
- Architecture for energy-efficient FPGA
- CAD technologies for energy-efficient power FPGA
- FPGA-based energy-efficient edge AI hardware
- FPGA-oriented AI algorithms
Paper Submission
Please go to the Submission Page
Contact person: Daisuke Suzuki (The Univ. Aizu, Japan)
E-mail: daisuke (at) u-aizu.ac.jp (Please replace “at” by @.)
