Chair
José L. Abellán, University of Murcia, Spain
Advances in VLSI technology have enabled an increasing number of logic blocks, like processor cores and memory modules, to be integrated into a single chip, facilitating the realization of multicore systems on a chip (MCSoC). Several interconnection approaches have been employed to connect these logic blocks. However, as the number of logic blocks increases, the interconnects play a more vital role in the MCSoC performance and operation cost. Consequently, innovative interconnect optimization approaches and design exploration have become essential to reaching performance and efficient MCSoC targets. The topics of interest of the track include but are not limited.
- Electronic/Photonic/RF NoC Architectures
- Power and energy issues in NoCs
- Application-specific NoC design
- Synchronous/asynchronous communication
- RTOS support for NoCs
- Modeling
- Simulation
- NoC support for MCSoC
- NoC for FPGAs and structured ASICs
- NoC design tools
- Photonic components
- Virtual fabrications
- Photonic circuits
- Routing
Former Chairs
- Prof. José L. Abellán, University of Murcia, Spain (15th IEEE MCSoC 2023, 16th IEEE MCSoC 2023 )
