{"id":11765,"date":"2026-03-09T01:35:27","date_gmt":"2026-03-09T01:35:27","guid":{"rendered":"https:\/\/mcsoc-forum.org\/site\/?page_id=11765"},"modified":"2026-03-09T02:23:34","modified_gmt":"2026-03-09T02:23:34","slug":"neurocore-t3","status":"publish","type":"page","link":"https:\/\/mcsoc-forum.org\/site\/index.php\/neurocore-t3\/","title":{"rendered":"Architectures for Large\u2011Scale Spiking Neural Systems"},"content":{"rendered":"\n<p>\n  <a href=\"https:\/\/mcsoc-forum.org\/site\/index.php\/neurocore\/\" style=\"font-weight: bold; color: #1b4d3e;\">\n    \u2190 Back to the NeuroCore 2026 Page\n  <\/a>\n<\/p>\n\n<div class=\"wp-block-group has-border-color has-medium-gray-border-color has-white-background-color has-background\" style=\"border-width:1px;border-radius:12px;padding-top:30px;padding-right:30px;padding-bottom:30px;padding-left:30px\">\n\n<h2 class=\"wp-block-heading has-text-color\" style=\"color:#00629b;text-transform:uppercase;letter-spacing:1px\">Session Chair<\/h2>\n<hr class=\"wp-block-separator has-text-color has-black-color has-alpha-channel-opacity has-black-background-color has-background is-style-wide\"\/>\n<div class=\"wp-block-media-text is-stacked-on-mobile\" style=\"margin-top:20px;margin-bottom:20px;grid-template-columns:15% auto\"><figure class=\"wp-block-media-text__media\"><img decoding=\"async\" src=\"http:\/\/mcsoc-forum.org\/site\/wp-content\/uploads\/2022\/01\/scholar-e1643363446774.jpg\" alt=\"Dr.\" class=\"wp-image-2593 size-full\"\/><\/figure><div class=\"wp-block-media-text__content\"><p class=\"has-large-font-size\"><strong><a href=\"https:\/\/scholar.google.com\/citations?user=P_dYs6UAAAAJ&amp;hl=fr\" style=\"text-decoration: none; color: #00629B;\">TBC<\/a><\/strong><br><span style=\"font-size: 0.9em; color: #555;\">TBC<\/span><\/p>\n<\/div><\/div>\n<\/div>\n\n\n\n<p>The <strong>Track on Architectures for Large\u2011Scale Spiking Neural Systems<\/strong> invites high\u2011quality submissions that advance the theory, design, implementation, and evaluation of next\u2011generation spiking neural computing platforms. As neuromorphic intelligence rapidly evolves toward brain\u2011scale, event\u2011driven, and energy\u2011efficient computation, this track aims to bring together researchers from computer architecture, VLSI\/3D\u2011IC design, computational neuroscience, machine learning, and embedded systems to explore emerging architectural paradigms for scalable spiking neural processing.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Scope and Topics of Interest<\/strong><\/h3>\n\n\n\n<p>We welcome original contributions, including (but not limited to):<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>1. Architectural Foundations<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Scalable architectures for large\u2011scale SNNs<\/li>\n\n\n\n<li>Event\u2011driven, asynchronous, and mixed\u2011signal neuromorphic processors<\/li>\n\n\n\n<li>2D\/3D integrated architectures for high\u2011density synaptic memory<\/li>\n\n\n\n<li>Crossbar\u2011based, RRAM\u2011based, PCM\u2011based, and memristive SNN accelerators<\/li>\n\n\n\n<li>Architectures for online learning, STDP, R-STDP, and local plasticity rules<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>2. Communication &amp; Interconnects<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Low\u2011latency, high\u2011bandwidth interconnects for spike\u2011based communication<\/li>\n\n\n\n<li>3D NoC, TSV\u2011aware, and fault\u2011tolerant routing for neuromorphic systems<\/li>\n\n\n\n<li>Event\u2011driven communication protocols and spike\u2011routing fabrics<\/li>\n\n\n\n<li>Scalable multi\u2011chip and wafer\u2011scale neuromorphic interconnects<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>3. System\u2011Level Design<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>End\u2011to\u2011end system architectures for brain\u2011scale SNNs<\/li>\n\n\n\n<li>Memory hierarchies and synaptic storage optimization<\/li>\n\n\n\n<li>Power\u2011aware, thermal\u2011aware, and reliability\u2011aware design methodologies<\/li>\n\n\n\n<li>Hardware\u2013software co\u2011design for large\u2011scale neuromorphic platforms<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>4. Algorithms, Models, and Co\u2011Optimization<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Co\u2011design of SNN models and hardware architectures<\/li>\n\n\n\n<li>Mapping, partitioning, and scheduling of large SNN workloads<\/li>\n\n\n\n<li>Learning algorithms optimized for hardware constraints<\/li>\n\n\n\n<li>Neuromorphic compilation, quantization, and model compression<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>5. Applications and Benchmarks<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Real\u2011time robotics, autonomous systems, and sensorimotor control<\/li>\n\n\n\n<li>Edge and cloud\u2011scale neuromorphic computing applications<\/li>\n\n\n\n<li>Bio\u2011inspired cognitive systems and brain\u2011machine interfaces<\/li>\n\n\n\n<li>Benchmarking methodologies and performance evaluation frameworks<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>\u2190 Back to the NeuroCore 2026 Page Session Chair TBCTBC The Track on Architectures for Large\u2011Scale Spiking Neural Systems invites high\u2011quality submissions that advance the theory, design, implementation, and evaluation of next\u2011generation spiking neural computing platforms. As neuromorphic intelligence rapidly evolves toward brain\u2011scale, event\u2011driven, and energy\u2011efficient computation, this track aims to bring together researchers from &hellip; <\/p>\n<p><a class=\"more-link btn\" href=\"https:\/\/mcsoc-forum.org\/site\/index.php\/neurocore-t3\/\">Continue reading<\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-11765","page","type-page","status-publish","hentry","nodate","item-wrap"],"_links":{"self":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages\/11765","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/comments?post=11765"}],"version-history":[{"count":5,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages\/11765\/revisions"}],"predecessor-version":[{"id":11787,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages\/11765\/revisions\/11787"}],"wp:attachment":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/media?parent=11765"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}