{"id":9813,"date":"2025-11-02T12:50:35","date_gmt":"2025-11-02T12:50:35","guid":{"rendered":"https:\/\/mcsoc-forum.org\/site\/?page_id=9813"},"modified":"2026-02-10T05:51:09","modified_gmt":"2026-02-10T05:51:09","slug":"track-cyber-physical","status":"publish","type":"page","link":"https:\/\/mcsoc-forum.org\/site\/index.php\/track-cyber-physical\/","title":{"rendered":"Multicore SoCs for Cyber-Physical and Autonomous Systems"},"content":{"rendered":"\n<div class=\"wp-block-group has-border-color has-medium-gray-border-color has-white-background-color has-background\" style=\"border-width:1px;border-radius:12px;padding-top:30px;padding-right:30px;padding-bottom:30px;padding-left:30px\">\n\n<h2 class=\"wp-block-heading has-text-color\" style=\"color:#00629b;text-transform:uppercase;letter-spacing:1px\">Track Chair<\/h2>\n<hr class=\"wp-block-separator has-text-color has-black-color has-alpha-channel-opacity has-black-background-color has-background is-style-wide\"\/>\n<div class=\"wp-block-media-text is-stacked-on-mobile\" style=\"margin-top:20px;margin-bottom:20px;grid-template-columns:15% auto\"><figure class=\"wp-block-media-text__media\"><img decoding=\"async\" src=\"http:\/\/mcsoc-forum.org\/site\/wp-content\/uploads\/2026\/02\/001_He.jpg\" alt=\"Xiaoming He\" class=\"wp-image-328 size-full\"\/><\/figure><div class=\"wp-block-media-text__content\"><p class=\"has-large-font-size\"><strong><a href=\"https:\/\/sites.google.com\/site\/yichungchen84\/\" style=\"text-decoration: none; color: #00629B;\">Xiaoming He<\/a><\/strong><br><span style=\"font-size: 0.9em; color: #555;\">Nanjing University of Post and TeleCommunications, China<\/span><\/p>\n<\/div><\/div>\n<\/div>\n\n\n\n<p>This track highlights the design, integration, and deployment of multicore system-on-chip (SoC) platforms tailored for cyber-physical systems (CPS) and autonomous applications. As these systems increasingly rely on real-time sensing, decision-making, and actuation, multicore SoCs must deliver high performance, low latency, and energy efficiency while meeting stringent safety and reliability requirements. <\/p>\n\n\n\n<p>We invite contributions that address architectural innovations, software-hardware co-design, and system-level optimization for CPS and autonomous platforms across domains such as robotics, automotive, aerospace, smart infrastructure, and industrial automation. This track fosters interdisciplinary collaboration across embedded systems, control theory, AI, and hardware design to advance the next generation of intelligent, autonomous, and cyber-physical multicore platforms. <strong>Topics of Interest Include:<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Architectures and platforms:<\/strong>\n<ul class=\"wp-block-list\">\n<li>Multicore SoCs for autonomous vehicles, drones, and robotics<\/li>\n\n\n\n<li>Heterogeneous and domain-specific cores for CPS workloads<\/li>\n\n\n\n<li>Real-time and safety-critical computing architectures<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li> <strong>System integration and co-design:<\/strong>\n<ul class=\"wp-block-list\">\n<li>Hardware\/software co-design for control, perception, and planning<\/li>\n\n\n\n<li>Sensor fusion and edge intelligence on multicore platforms<\/li>\n\n\n\n<li>Middleware and runtime systems for CPS coordination<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li> <strong>Reliability, safety, and security:<\/strong>\n<ul class=\"wp-block-list\">\n<li>Fault-tolerant and resilient SoC designs<\/li>\n\n\n\n<li>Secure execution environments for autonomous systems<\/li>\n\n\n\n<li>Compliance with functional safety standards (e.g., ISO 26262, DO-254)<\/li>\n<\/ul>\n<\/li>\n\n\n\n<li> <strong>Evaluation and deployment:<\/strong>\n<ul class=\"wp-block-list\">\n<li>Benchmarking and performance analysis for CPS workloads<\/li>\n\n\n\n<li>Energy-aware and thermal management strategies<\/li>\n\n\n\n<li>Deployment frameworks for field validation and lifecycle monitoring<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n\n\n\n<p><\/p>\n\n\n\n<hr class=\"wp-block-separator has-alpha-channel-opacity\"\/>\n\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Track Chair Xiaoming HeNanjing University of Post and TeleCommunications, China This track highlights the design, integration, and deployment of multicore system-on-chip (SoC) platforms tailored for cyber-physical systems (CPS) and autonomous applications. As these systems increasingly rely on real-time sensing, decision-making, and actuation, multicore SoCs must deliver high performance, low latency, and energy efficiency while meeting &hellip; <\/p>\n<p><a class=\"more-link btn\" href=\"https:\/\/mcsoc-forum.org\/site\/index.php\/track-cyber-physical\/\">Continue reading<\/a><\/p>\n","protected":false},"author":5,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-9813","page","type-page","status-publish","hentry","nodate","item-wrap"],"_links":{"self":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages\/9813","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/comments?post=9813"}],"version-history":[{"count":7,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages\/9813\/revisions"}],"predecessor-version":[{"id":11456,"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/pages\/9813\/revisions\/11456"}],"wp:attachment":[{"href":"https:\/\/mcsoc-forum.org\/site\/index.php\/wp-json\/wp\/v2\/media?parent=9813"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}