Autonomous systems are a tremendous challenge for communication and computation architectures used in conventional systems: High computational performance requiring various special processing units and accelerators combined with stringent requirements on safety, reliability, security, low-power, etc. can hardly be realized by the rather static architectures in current vehicles. The advent of multi- and many-core systems gave rise to promising opportunities to address the outlined problems: The availability of multiple, heterogeneous processors with a powerful communication infrastructure enables the concurrent execution of multiple applications with options to employ spare cores for fault-tolerance or realize spatial isolation of applications to enhance security aspects. As a result, not only a large body of research on parallel programming models and software synthesis for embedded computing arose but also many novel algorithms have been proposed to map applications to parallel systems and optimize for performance, throughput, energy efficiency, thermal distribution or a combination thereof.
However, those established techniques typically address rather static systems with a special focus on design-time mapping and optimization. While autonomous systems have to constantly adapt to their current environment, tasks, and unexpected situations like faults or attacks, one has to shift the attention towards application mixes that may constantly change at run-time. Furthermore, with the number of cores ranging in the thousands, with novel networks-on-chip architectures, with new memory interfaces and technologies, with heterogeneity becoming mainstream and with tighter integration of reconfigurable fabric, those static design-time mapping techniques must be revisited. In this hot-topic session, the authors reflect on the complexity of the mapping problem, propose solutions for scalable mapping techniques and reason about mapping for multiple applications which shall cover fundamental aspects and problems for both design-time and run-time mapping approaches. Further, a provider for heterogeneous many-core platforms contributes to the session by offering a hands-on perspective on mapping and the aspect of timing predictability for high-integrity applications in autonomous systems.

Paper Submission:

Please submit your paper to the Special Session on Scalable and Flexible Many-Core Mapping Techniques via the 12th
IEEE MCSoC-2018 online submission system: http://mcsoc-forum.org/2018/submission/

Session Organizer(s): 

Prof. Dr.-Ing. Jeronimo Castrillon-Mazo
Email:  jeronimo.castrillon(a)tu-dresden.de
Technische Universität Dresden
cfaed – Center for Advancing Electronics Dresden
Germany