Formal Verification and Benchmarking of Multicore SoC Platforms

Chairs

TBC

TBC

This track focuses on rigorous methodologies for ensuring correctness, reliability, and performance in multicore system-on-chip (SoC) platforms. As SoCs grow increasingly complex—with heterogeneous cores, AI accelerators, and energy-aware components—formal verification and benchmarking become essential tools for validating functionality and comparing architectural choices. We invite contributions that advance the theory, tools, and practical deployment of formal methods and benchmarking frameworks for embedded and high-performance multicore SoCs.

Topics of Interest Include:

  • Formal verification techniques:
    • Model checking, theorem proving, and equivalence checking
    • Runtime verification and assertion-based validation
    • Formal specification languages and property synthesis
  • Benchmarking methodologies:
    • Performance evaluation frameworks and metrics
    • Comparative analysis of verification tools and platforms
    • Workload characterization and synthetic benchmarks
  • Emerging challenges:
    • Verification of heterogeneous and AI-integrated SoCs
    • Energy-efficient and real-time systems
    • Scalable verification for manycore architectures
  • Toolchains and automation:
    • Integration of formal tools into design flows
    • Open-source and commercial benchmarking suites
    • Hardware/software co-verification environments

This track aims to bridge the gap between theoretical rigor and practical deployment, fostering collaboration across academia, industry, and standards communities.


Permanent link to this article: https://mcsoc-forum.org/site/index.php/track-formal-verification/