**Only recent speakers are listed here.
Dr. Kiat Seng Yeo, Professor, Advisor (Global Partnerships) at Singapore University of Technology and Design (SUTD), Singapore
Title: Can Modern Electronics Keep Pace with Moore’s Law?
Abstract: The invention of the transistor in 1948 at Bell Laboratories was a turning point in the history of electronics. The transistor promises to revolutionize electronics; indeed, it has become an integral and essential part of our lives. This talk begins with an introduction to early computers, the invention of integrated circuits, and how it changed the electronics industry. As integrated circuits evolve, it is essential to know the forces that have driven it along its historical trajectory and to discover how much further it could go. Can the electronic revolution keep pace with Moore’s Law? What are the embedded system design and technology challenges? Is electronics still evolving, or has it come to an end? What is the next big thing? How is it going to affect us? This keynote will attempt to answer these questions. In conclusion, the other trends to watch for the next revolution will be presented.
Biography: Professor Kiat Seng YEO (M’00–SM’09–F’16) received his B.Eng. (EE) in 1993 and Ph.D. (EE) in 1996, both from Nanyang Technological University (NTU), Singapore. Currently, he is a full professor and Advisor (Global Partnerships) at the Singapore University of Technology and Design (SUTD) and a distinguished professor at Tianjin University. He was Chairman of the University Research Board, Member of the Academic Council, Associate Provost for Research, and Founding Associate Provost for Graduate Studies and International Relations at SUTD. He has over 30 years of experience in industry, academia, and consultancy. Before joining SUTD, he was a full professor at NTU; and spent 13 years in management positions as Associate Chair (Research), Head of Circuits and Systems, and Sub-Dean (Students Affairs). Professor Yeo was also a Fellow of the Renaissance Engineering Programme (REP) and was a Senator and Advisory Board Member at NTU. He has made many outstanding contributions to advance Singapore’s education and research ambitions throughout his career. As the Founding Director of VIRTUS, a S$52 million IC Design Centre of Excellence jointly set up by NTU and the Singapore Economic Development Board (EDB), he contributed extensively to the economic development of integrated circuit design in Singapore by leading multidisciplinary research, with a focus on industry collaboration. In 2016, he initiated the FIRST (Fostering Industrial Research Success Together) Industry Workshop at SUTD. Today, it is a flagship event with an attendance of over 1,000 professionals from the industry. Since 1996, Professor Yeo has been providing consultancy services to statutory boards, local SMEs, and multinational corporations in the areas of electronics and IC design. As Principal Investigator, he secured over SGD70 million in research funding from various funding agencies and industry. He is the author of 13 books and 7 book chapters and has published over 600 top-tier refereed journal and conference papers in his area of research and holds 39 patents, including 2 patents for the world’s smallest integrated transformer, a patent for the world’s smallest integrated filter for 60GHz standard, the inventor of several high Q-factor RF spiral inductors and co-inventor of quite a few novel circuit techniques for 5G/6G wireless communication and RF/mm-wave IC applications. Professor Yeo is a world-renowned expert in low-power RF/mm-wave integrated circuit design and a recognized expert in CMOS technology. He holds/held positions such as advisor, chair, co-chair, and technical chair at many international conferences. He was awarded the Public Administration Medal (Bronze Award) by the President of the Republic of Singapore on National Day 2009 and was awarded the Nanyang Alumni Achievement Award in 2009 in recognition of his outstanding contributions to the University and society. Professor Yeo is an academician of the Singapore Academy of Engineering, an academician of the Singapore National Academy of Science, a Fellow of IEEE, and a Fellow of the Asia-Pacific Association for Artificial Intelligence (AAIA). He is the principal author of the Integrated Circuit Design Research Ranking for Worldwide Universities 2008 and World University Research Rankings (WURR) 2020. Professor Yeo was ranked among the World’s top 2% of scientists by Stanford University from 2020 to 2023.
Dr. Yuichi Nakamura, Senior Executive Professional, NEC Corp, Japan / Guest Professor, Waseda University, Japan
Title: Quantum Computing: New Frontier or Nightmare?
Abstract: Quantum computers would be able to perform calculations in a few seconds which would take conventional computers millions of years, and there are great expectations regarding their high speed. For example, a Quantum Computer has the potential to discover new medicine and the composition of new catalysts that contribute to carbon neutrality by its high-speed calculation. Quantum computers have also the potential to generate up to trillions of dollars in value through efficiency improvements in finance, transportation, factory automation, and machine learning. In this talk. the basics and calculation principles of quantum computer calculations are presented, and then the technical issues facing the practical application of quantum computers, and the possibilities for solving the causes are explained.
Biography: Dr. Yuichi Nakamura received his B.E. in information engineering and M.E. in electrical engineering from the Tokyo Institute of Technology in 1986 and 1988, respectively. He received his Ph.D. from the Graduate School of Information, Production and Systems, Waseda University, in 2007. He joined NEC Corp. in 1988 and led NEC’s research about embedded system design and quantum technologies as a general manager and a vice president at NEC research and development. Currently, he is a senior executive professional at NEC Corp. He is also a guest professor at Kyushu University, Waseda University, and Tokyo University and an invited professor at Osaka University. He has over 30 years of professional experience
in electronic design automation, signal processing, supercomputer design, combinational optimization, and quantum computing. Dr. Yuichi Nakamura contributed to managing and leading several innovative signal processing and computing projects. He has published over 25 journal articles and 40 international conference papers and has had many keynote talks at major conferences. He is a board member of the Japanese government quantum innovation meeting, a program officer of the Japanese Quantum sensing project, and an evaluation committee of several Japanese government grant meetings.
Dr. Ahmed Fakhfakh, General Director of the Digital Research Center of Sfax (CRNS) / Professor, National School of Electronics and Telecommunications of Sfax (ENET’Com), Sfax, Tunisia
Title: Real-Time High-Precision Indoor Mobile Target Localization Using Energy-Efficient Wireless Sensor Networks
Abstract: Indoor localization of a mobile target represents a prominent application within a wireless sensor network (WSN), showcasing significant values and scientific interest. Interference, obstacles, and energy consumption are critical challenges for indoor applications and battery replacements. A proposed tracking system deals with several factors, such as latency, energy consumption, and accuracy, presenting an innovative solution for the mobile localization application. This study investigates various methods and algorithms for real-time localization of a mobile object within a confined indoor environment, aiming to achieve the highest possible accuracy while minimizing energy consumption. We utilized a wireless sensor network (WSN) to gather and process localization data. Our comprehensive evaluation encompassed state-of-the-art signal processing techniques, machine learning algorithms, and hybrid approaches integrating multiple data sources. The primary focus was optimizing the trade-off between localization precision and energy efficiency, addressing challenges such as signal interference, environmental variability, and computational constraints. Experimental results demonstrate that the proposed methods significantly enhance real-time localization accuracy and reduce power consumption, providing valuable insights for developing energy-efficient indoor positioning systems utilizing WSNs.
Biography: Ahmed Fakhfakh has been a full professor at the National School of Electronics and Telecommunications of Sfax (ENET’Com) at the University of Sfax in Tunisia since 2015 and the General Director of the Digital Research Center of Sfax (CRNS) since 2023. He obtained his HDR diploma from Sfax University in 2009, his PhD from Bordeaux University, France, in 2002, and his electrical engineering diploma in 1997 from Sfax National School of Engineering (ENIS), Tunisia. He is the head of the Intelligent Systems: Design and Implementation research group at the Laboratory of Signals, SysteMs, aRtificial Intelligence and neTworkS (SM@RTS) in the digital research centre of Sfax in Tunisia. His research interests include developing smart solutions for energy management in a smart grid, designing and implementing IoT solutions, designing wake-up solutions for Wireless sensor network applications, and designing energy harvesting solutions.
Dr. Hiroki Nakahara, CEO, Tokyo Artisan Intelligence Co., Ltd. / Professor, Tohoku University, Japan
Title: An FPGA-based Accelerator Platform for an Edge AI
Abstract: With the development of deep learning, the “edge AI” market, including embedded systems, tends to expand. Since edge AI requires
large operations under limited computational resources, data structures, and architectures are being researched and developed. The importance of edge AI is increasing due to security and communication speed considerations, and its applications are expanding. However, edge AI requires lightweight models and hardware innovations to process in real-time due to limited computational resources. We will introduce technologies suitable for edge AI. Prof. Hiroki Nakahara established Tokyo Artisan Intelligence (TAI) Co., Ltd., which develops edge AI for business. We will introduce the edge AI business conducted at TAI and the SEASIDE (A Specified Edge AI SoM for Intelligence Design and Embedding) platform, an edge AI solution by TAI. SEASIDE is an FPGA-based computation platform, enabling the efficient implementation of AI solutions that customize models by leveraging the
flexibility of the FPGA. This presentation will explain TAI FPGA implementation technology and introduce the roadmap for the SEASIDE platform.
Biography: Hiroki Nakahara is a founder and CEO at Tokyo Artisan Intelligence Co., Ltd., a professor at Tohoku University, and a specific professor at
Tokyo Insitute of Technology. His research interests include logic synthesis, reconfigurable architecture, embedded systems, and machine learning. He received a Ph.D. degree in computer science from the Kyushu Institute of Technology in 2007. Prof. Nakahara received the 8th IEEE/ACM MEMOCODE Design Contest 1st Place Award in 2010, the SASIMI Outstanding Paper Award in 2010, the IPSJ Yamashita SIG Research Award in 2011, the 11th FIT Funai Best Paper Award in 2012, the 7th IEEE MCSoC-13 Best Paper Award in 2013, and the ISMVL2013 Kenneth C. Smith Early Career Award in 2014. He was the Workshop Chairman for the ULSIWS from 2014 to 2017; as the Program Chairman for the HEART in 2017. In addition, due to his academic contributions, he was selected as the general chair of the FPT’23. In 2022, the National Institute for Science and Technology Policy (NISTEP) awarded him the title of “Nice Step Researchers 2022” for his outstanding contributions to the development of science, technology, and innovation.
Mr. Yong Kai Ping, Chief Executive Officer of the Selangor Information Technology & Digital Economy Corporation (Sidec), Malaysia
Title: Malaysia Semiconductor IC Design Park Development: Pioneering Southeast Asia’s Semiconductor Future
Abstract: As Southeast Asia rises to prominence in the global semiconductor industry, Malaysia stands at the forefront with its groundbreaking initiative, the Malaysia Semiconductor IC Design Park. This keynote session, delivered by Yong Kai Ping, CEO of SIDEC, will explore the strategic vision behind this transformative project, its role in positioning Malaysia as a regional leader, and its impact on the global semiconductor landscape. The session will delve into how the IC Design Park, supported by the collaboration of federal and state governments, global technology firms, and venture capitalists, is creating an ecosystem that fosters innovation, talent development, and sustainable growth. The park is designed to attract cutting-edge IC design companies, offering advanced infrastructure, Electronic Design Automation (EDA) tools, and critical industry partnerships. Yong Kai Ping will highlight key milestones of the initiative, including the role of the Malaysia Advance Semiconductor and AI Academy in training the next generation of engineers, and the establishment of the RM100 million Semiconductor Venture Fund, which aims to fuel the growth of high-potential semiconductor companies in Malaysia. Join this keynote to gain insight into how Malaysia is pioneering the future of semiconductors in Southeast Asia and laying the groundwork for a new era of technological leadership in the region.
Biography: Yong Kai Ping is the esteemed Chief Executive Officer of the Selangor Information Technology & Digital Economy Corporation (Sidec). With a robust background in digital transformation and media, Yong has been instrumental in positioning Selangor as ASEAN’s leading digital hub. His strategic leadership at Sidec focuses on accelerating digitalization across e-commerce, startups, and SMEs, fostering an ecosystem of innovation and growth. Yong’s journey in the digital economy is marked by his notable tenure as CEO of Sidec since 2021 and as CEO of SITEC from 2015 to 2020. Under his guidance, SITEC significantly contributed over RM334 million to the Selangor economy and nurtured 90 startups through the Selangor Accelerator Programme. Yong’s visionary efforts have facilitated the digital education of 650 e-commerce merchants and successfully promoted SME digitalization. Before leading Sidec and SITEC, Yong was at the helm of KiniTV as its CEO, where he propelled the platform to achieve 150 million views in 2015, establishing it as one of Southeast Asia’s largest online TV channels. His extensive experience includes a pivotal role as the Chinese Editor for Malaysiakini, Malaysia’s most influential online news portal, where he served for nearly 12 years. A British Chevening Scholar, Yong holds a Master of Arts in International Relations from the University of Birmingham, UK. He has further enriched his expertise through participation in the Senior Journalist Programme at the East West Centre in Hawaii, USA. He has organized prominent media conferences, including the Asia Chinese New Media Conference and the Southeast Asia Internet TV Conference. Yong’s accolades include the Digital Hub Status award by MDEC and Silicon Valley Pitching & Industrial Visit. His dedication to the digital economy and media has propelled his professional success and significantly impacted Selangor’s economic landscape, making him a distinguished leader in the field.
Takahiro Hanyu , Professor, Tohoku University, Japan
Title: ”Challenge of MTJ-Based Nonvolatile Hardware for Edge AI Applications ”
Abstract: Nonvolatile spintronic devices have potential advantages such as fast read/write and high endurance together with back-end-of-the-line compatibility of semiconductor fabrication, which offers the possibility of constructing not only stand-alone RAMs and embedded RAMs that can be used in conventional VLSI circuits and systems but also realizing standby-power-free and high-performance VLSI processors, which could open up a practical intermittent-computing paradigm for internet-of-things (IoT) applications. My presentation presents some AI-hardware examples based on MTJ-based nonvolatile logic-in-memory architecture, and their suitability for IoT applications is discussed.
Biography: Takahiro Hanyu received the B.E., M.E., and D.E. degrees in Electronic Engineering from Tohoku University, Sendai, Japan, in 1984, 1986, and 1989, respectively. He is currently a full professor and the director (from April 2022 to present) at the Research Institute of Electrical Communication, Tohoku University. His general research interests include nonvolatile logic circuits, their applications to ultra-low-power and/or highly dependable VLSI processors and post-binary computing, and their application to brain-inspired VLSI systems and edge AI hardware.
He received the Sakai Memorial Award from the Information Processing Society of Japan in 2000, the Judge’s Special Award at the 9th LSI Design of the Year from the Semiconductor Industry News of Japan in 2002, the Special Feature Award at the University LSI Design Contest from ASP-DAC in 2007, the APEX Paper Award of Japan Society of Applied Physics in 2009, the Excellent Paper Award of IEICE, Japan, in 2010, the Ichimura Academic Award in 2010, the Best Paper Award of IEEE ISVLSI 2010, the Paper Award of SSDM 2012, the Best Paper Finalist of IEEE ASYNC 2014, and the Commendation for Science and Technology by MEXT, Japan, in 2015. Dr. Hanyu is a Senior Member of the IEEE.
Mahdi Nikdast, Associate Professor, Colorado State University, USA
Title: ”The Silicon Photonics Marathon: From Optical Interconnect to Computing and Memory!”
Abstract: Silicon photonics technology has facilitated the deployment of integrated photonics across different application domains, from ultra-fast communication for chip-scale interconnect and Datacom applications to energy-efficient optical computation for accelerating AI and machine learning applications. More recently, the integration of silicon photonics and nonvolatile phase change materials has also created a unique opportunity to realize photonic memory and in-memory optical computing. In this keynote, through an interdisciplinary approach and from device to system level, I will present a holistic overview of the promise and challenges of silicon photonics when employed for inter- and intra-chip optical interconnect AI acceleration and memory applications. I will present several examples of many-core systems-on-chip (SoCs) integrating silicon photonics and how to design solutions based on hardware-software co-design and cross-layer co-optimization that can efficiently address some of the existing challenges in such systems.
Biography: Mahdi Nikdast is an Associate Professor and Endowed Rockwell-Anderson Professor in the Department of Electrical and Computer Engineering at Colorado State University (CSU), Fort Collins, where he is directing the Electronic-PhotoniC System Design (ECSyD) Laboratory. He received his Ph.D. in Electronic and Computer Engineering from The Hong Kong University of Science and Technology (HKUST), Hong Kong, in 2014. From 2014 to 2017, he was a postdoctoral fellow at McGill University and Polytechnique Montreal, Quebec, Canada. His research interests are at the intersection of integrated photonics, emerging technologies, and high-performance computing. Prof. Nikdast and his students have published numerous papers in refereed journals and international conference publications and across different areas of VLSI, EDA, Photonics, Embedded Systems, Systems-on-Chip (SoCs), Artificial Intelligence (AI), and Computer Architecture. He has edited a book on Silicon Photonics for High-Performance Computing and Beyond, published by Taylor and Francis Group in 2022, and another book on Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges, published by River Publishers in 2017. Prof. Nikdast currently serves as an Associate Editor for IEEE Transactions on Very Large Scale Integration Systems (IEEE TVLSI), and has served on the TPC of various international conferences, including DAC, OFC, DATE, ICCAD, ESWEEK, NOCS, etc. He is a co-founder of the International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS workshop) and the North American Workshop on Silicon Photonics for High-Performance Computing (SPHPC Workshop). Prof. Nikdast and his team were the recipient of various awards, including the Second Best Project Award at the AMD Technical Forum and Exhibition (AMD-TFE 2010, Taiwan), the Best Paper Award at the Asia Communications and Photonics Conference (ACP 2015, Hong Kong), the Best Paper Award at the Design, Automation, and Test in Europe (DATE) Conference (DATE 2016 – Test Track, Dresden), the Best Paper Award Candidate at ACM Great Lake Symposium on VLSI (GLSVLSI 2018, USA), and the Best Paper Honorable Mention Award at ACM Great Lake Symposium on VLSI (GLSVLSI 2020, China). Prof. Nikdast received the prestigious NSF CAREER Award (2021), the George T. Abell Award for Outstanding Early-Career Faculty (2022), the Rockwell-Anderson Professorship (2022), and the George T. Abell Award for Teaching and Mentoring (2023). He is a Senior Member of the IEEE.
Khein-Seng Pua, Founder and CEO of Phison Electronics, Taiwan
Title: ”Challenges and Opportunities of Next-Generation Enterprise SSD Storage”
Abstract: Data is driving the transformation of the world, including the Internet of Everything, AI, and high-speed computing technologies. All of which are driving the digital transformation of all industries and assisting humans and enterprises to make faster and more accurate decisions through data analysis and artificial intelligence. In such a transformation process, data storage and reading and writing behaviors play a very important role; for example, the computing results of artificial intelligence come from the collection of big data, the foundation of cloud services comes from the construction of data centers, and the server environment for high-speed computing comes from the matching stable and high-speed enterprise-level storage architecture. What kind of challenges and opportunities will enterprise SSDs face due to the transformation of these digital technologies? Welcome to the keynote speech of KSPua, CEO of Phison, to explore the latest enterprise SSD technologies and development trends.
Biography: KS Pua is the Founder and CEO of Phison Electronics. He was born in a farming community Sekinchan in Selangor, Malaysia, in 1974. At the age of 19, he went to Taiwan with just US$4,000 in his pocket. With no relatives to help him, his only dream was to study hard; he graduated from National Chiao Tung University (NCTU) in Hsinchu, Taiwan, in 1997 and earned a Master’s from NCTU in 1999. Mr. Pua and his four friends founded Phison Electronics Corp. in Taiwan. He designed and produced the world’s first single-chip USB flash controller with other founders. Under his leadership, the company has become a global leader in NAND Flash controller IC and storage solutions. As an entrepreneur, Mr. Pua is a successful high-tech entrepreneur and the recipient of the Ten Outstanding Young Malaysian Awards and received the Outstanding Young Entrepreneur Award, the Outstanding Young Manager Award, and The President Award of National Management Excellence Award from the Government. He was elected a Fellow of the Chinese Society for Management Of Technology in 2009. In 2020, Phison enjoyed a turnover of US$1.64 billion and became the largest independent NAND controller and NAND storage solution provider globally, and was named 65th in U.S magazine Bloomberg Businessweek’s Tech 100 in the year of 2010. From 2015 to the present, the production value of Phison was ranked top 4 IC Design Houses in Taiwan’s IC design industry.
Steven Fong, Managing Director, AMD South Asia Pacific Sales, Singapore
Title: ”Accelerating Silicon technology to deliver the exponential growth in Compute”
Abstract: As we migrate up the use case on vast data collected globally over decades, the need for computing grows to manage that transition. There is a huge implication for the accelerated push on silicon technology to deliver that compute level. With Moore’s law diminishing after decades of keeping up the double in 2 years, this poses an exponential challenge to deliver the desired compute in a silicon device. The industry needs to innovate to compensate for the decelerating Moore law. One of the changes that allow us to keep up is Advanced packaging, which has grown in importance to the performance of the device. Using 2D, 2.5D, 3D with better TSV, interposer, and interconnect will soon become the next norm. Another emerging side effect of expanding computing is the need for power and thermal management. With the infinite number of connected devices over the next decades, the semiconductor industry has an impact on world energy. This raises the importance of performance per watt, especially from the recent impact of Generative AI on data centers.
Biography: Steven Fong is Managing Director for AMD South Asia Pacific Sales since the merger of AMD/Xilinx. Prior, he spent 11 years (2008-2022) with Xilinx across multiple roles as Senior Director. Steven had established the Global Pricing group and was managing both Xilinx worldwide strategic and field tactical pricing. Several world-class business models are now intrinsic to AMD Adaptive Embedded Computing Group’s commercial principles. The newly built pricing establishment has become an essential cornerstone to enable Xilinx’s world-class growing Gross margin from 2009 (GM 64%) to 2019 (GM 73%). Steven also doubled his role to establish Xilinx worldwide first consumer strategy (2014~2016) and is a sitting member of AMD Singapore leadership council till now. Steven founded Xilinx South Asia Pacific Sales Group (2019) and doubled the business over three years. Prior to Xilinx, Steven spent 13 years in STMicroelectronics as a regional & global marketing/business leader for Analog products. He established STMicroelectronic first Asian-based Global strategic business unit in 2004 and doubled the revenue/margin over four years. Steven graduated with an honor degree (Electronic Engineering, 1995) from Nanyang Technological University. He also has a Master in Management (2006) from the Macquarie Graduate School of Management, an MBA (2008) from the University of Western Australia, and a Postgraduate Diploma from the Chartered Institute of Marketing (UK).
Dr. Abderazek Ben Abdallah, Professor, The University of Aizu, Japam
Title: ”Neuromorphic Computing Chips for AI at the Edge”
Abstract: In this keynote, we will explore the transformative potential of neuromorphic computing chips for artificial intelligence at the edge. As AI applications increasingly demand real-time processing and energy efficiency, neuromorphic chips offer a brain-inspired approach that enables adaptive, low-power solutions. We will discuss the architecture and benefits of neuromorphic systems, highlighting their capacity to enhance edge computing across various domains, including healthcare, IoT, and autonomous systems. The talk will cover recent advancements, practical implementations, and future prospects of neuromorphic computing, emphasizing its critical role in the evolution of smart and efficient AI technologies.
Biography: Abderazek Ben Abdallah is a Professor in the Division of Computer Engineering at the University of Aizu’s School of Computer Science and Engineering, where he has served as Dean since April 2022 and as a Regent. Dr. Ben Abdallah earned a B.S. in Electrical Engineering from Sfax University and Huazhong University of Science and Technology (1994), an M.S. in Computer Engineering from Huazhong University (1997), and a Ph.D. in Computer Engineering from the University of Electro-Communications, Tokyo (2002). He began his academic career as a Research Associate and Assistant Professor at the University of Electro-Communications until 2007, after which he joined the University of Aizu and advanced to Professor, taking on leadership roles, including Head of the Computer Engineering Division from 2014 to 2022.
His research centers on designing and optimizing high-performance, energy-efficient computing systems, particularly for digital signal processing. Prof. Ben Abdallah explores computer architecture, processor design, parallel computing, and advanced interconnection networks, such as 3D-NoC. Additionally, he focuses on integrated circuit reliability, addressing thermal management and fault tolerance, and contributes to embedded machine learning through algorithm optimization and FPGA acceleration for low-power intelligent devices. Furthermore, he develops brain-inspired architectures utilizing learning algorithms and FPGA/VLSI implementations.
Prof. Ben Abdallah has authored four books, including “Neuromorphic Computing: Principles and Organization,” and published over 150 journal articles and conference papers, supported by 15 research grants. He teaches various undergraduate and graduate courses and has supervised numerous theses, including four postdoctoral fellows and ten Ph.D. dissertations. He has held visiting positions at several esteemed institutions.
A Senior Member of IEEE and ACM, Dr. Ben Abdallah actively engages in the academic community through conference leadership and serves on various technical committees. His achievements include several Best Paper Awards, the President’s Prize for Scientific Research and Technology (Tunisia, 2010), as well as more than 23 keynote addresses delivered at international conferences.
