Brain-Inspired Algorithm–Hardware Co-Optimization

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Track Chair

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Dr. Alberto Marchisio
New York University (NYU) Abu Dhabi, UAE

Call for Papers: Brain‑Inspired Algorithm–Hardware Co‑Optimization

Neuromorphic computing thrives when algorithms and hardware are conceived as a unified system rather than independent layers. This track focuses on cross‑disciplinary innovations that co‑optimize brain‑inspired algorithms with their underlying hardware substrates to achieve maximal efficiency, scalability, and real‑time adaptability.
As neuromorphic systems evolve toward event‑driven, low‑power, and cognitively capable architectures, co‑design becomes essential for aligning computational models with device‑level constraints, memory hierarchies, communication fabrics, and emerging technologies. This track invites contributions that advance the theory, design, and implementation of algorithm–hardware co‑optimization across all layers of the neuromorphic stack—from learning rules and neural models to circuits, architectures, and full systems.

Topics of Interest include, but are not limited to:

• Brain‑Inspired and Neuromorphic Algorithms
  • Spiking neural networks (SNNs) and event‑driven learning
  • Bio‑plausible learning rules and neural coding strategies
  • Cognitive and adaptive algorithmic models
• Algorithm–Hardware Co‑Design
  • Cross‑layer optimization from device to system level
  • Mapping algorithms to neuromorphic substrates efficiently
  • Co‑optimization frameworks for latency, energy, and accuracy
• Event‑Driven and Low‑Power Architectures
  • Event‑driven processing pipelines
  • Ultra‑low‑power neuromorphic accelerators
  • Real‑time adaptive and autonomous systems
• In‑Memory and Near‑Memory Computing
  • Memory‑centric architectures for neuromorphic workloads
  • Compute‑in‑memory (CIM) and analog in‑memory processing
  • Memory–algorithm co‑design for SNNs and sparse workloads
• Learning‑on‑Chip and On‑Device Intelligence
  • Online learning, continual learning, and local adaptation
  • Hardware‑efficient training and inference methods
  • Lightweight models for edge and embedded neuromorphic systems
• Emerging Devices and Novel Substrates
  • RRAM, PCM, FeFETs, spintronics, photonics, and other emerging devices
  • Device‑level characteristics and their algorithmic implications
  • Hybrid CMOS–non‑CMOS neuromorphic platforms
• System‑Level Integration and Demonstrations
  • End‑to‑end neuromorphic systems showcasing co‑optimized design
  • Benchmarks, evaluation methodologies, and workload characterization
  • Applications in robotics, sensing, autonomous systems, and cognitive computing