Sustainable Design and Lifecycle Management for Multicore SoCs

Track Chair


Kaijie Wei

Kaijie Wei
Keio University, Japan

This track focuses on methodologies, tools, and frameworks that promote sustainability across the entire lifecycle of multicore system-on-chip (SoC) platforms—from design and manufacturing to deployment, maintenance, and end-of-life. As energy efficiency, environmental impact, and long-term reliability become critical concerns, this track invites innovative approaches that address the ecological and operational challenges of modern SoC development. This track encourages interdisciplinary contributions that bridge hardware design, system engineering, sustainability science, and lifecycle analytics to shape the next generation of environmentally responsible multicore SoCs. Topics of Interest Include:

  • Sustainable design methodologies:
    • Energy- and resource-efficient SoC architectures
    • Low-power and energy-harvesting techniques
    • Design-for-reliability and design-for-reuse strategies
  • Lifecycle-aware system management:
    • Predictive maintenance and fault diagnosis
    • Aging-aware design and reliability modeling
    • Lifecycle cost and environmental impact analysis
  • Green computing and circular design:
    • Reconfigurable and modular SoC architectures
    • Recycling-aware hardware design
    • Sustainable materials and packaging for SoCs
  • Tools and frameworks:
    • Lifecycle simulation and modeling tools
    • Metrics and benchmarks for sustainability assessment
    • Integration of sustainability into EDA workflows

PATRON, HOST, and SPONSORS


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